.BondLib.Examples.ModelicaSpice.NandGate.TestNand

Information

The nand gate is a basic CMOS building block. It consists of four CMOS transistors. The output voltage Nand.y.v is low if and only if the two input voltages at Nand.x1.v and Nand.x2.v are both high. In this way the nand functionality is realized.

The simulation end time should be set to 1e-7. Please plot the input voltages Nand.x1.v, d Nand.x2.v, and the output voltage Nand.y.v.

Repeat the simulation using all five levels of MOSFET modeling currently available:

 Level:   MOSFET modeling level (default value = 3)
            Level=0: Static injection model
            Level=1: Shichman-Hodges model
            Level=2: Grove-Frohman model
            Level=3: Empirical model
            Level=4: Simplified Grove-Frohman model

Reference:

Tietze, U.; Schenk, Ch.: Halbleiter-Schaltungstechnik. Springer-Verlag Berlin Heidelberg NewYork 1980, p. 157

Main Authors:

Christoph Clauß <clauss@eas.iis.fhg.de>
André Schneider <schneider@eas.iis.fhg.de>
Fraunhofer Institute for Integrated Circuits
Design Automation Department
Zeunerstraße 38
D-01069 Dresden

Copyright:

Copyright © 1998-2002, Modelica Association and Fraunhofer-Gesellschaft.
The Modelica package is free software; it can be redistributed and/or modified under the terms of the Modelica license, see the license conditions and the accompanying disclaimer in the documentation of package Modelica in file "Modelica/package.mo".