modelLogicAnalyzer

Logic analyser probe with 8 channels: records the lines it is clipped to (VCD file for PulseView) and decodes them into a text file (UART, I2C, synchronous serial: hex + ASCII, ASCII timing diagram)

Information

Probe of a logic analyser: connect its channels CH0…CH7 to lines of the circuit (a UART link, the SCL/SDA lines of an I2C bus, the clock and data lines of an HX711, a PWM output...) and its GND to the ground of the circuit, as with the clips of a real analyser (or uncheck useGroundPin, "Electrical" tab: the pin disappears and the probe is referenced to the simulation ground, 0 V). Each channel has a very high input impedance (GIn, 1 GΩ to ground): the circuit behaves the same with or without the probe.

Each channel has its own tab (CH0…CH7): a name and a kind (Interfaces.ChannelKind):

  • Off: not recorded, costs nothing, and its pin disappears from the icon. By default, CH0…CH3 are Logic and CH4…CH7 are Off: give a kind to a channel to make its pin appear. The names of the active channels are shown in green on the icon;
  • Logic: logic level only — also the kind of a clock line;
  • Uart: serial link decoded with the format of the tab (speed, data bits, parity, stop bits, bit order);
  • I2cSda: SDA line of an I2C bus, whose SCL line is the channel clockChannel;
  • SyncData: data of a synchronous serial link (HX711, simplified SPI), read on an edge of the channel clockChannel, in words of wordBits bits.

At the end of the simulation, the probe writes in the simulation folder, named after the component unless fileName is given (full paths in the log):

  • a text file (writeText), opened in Notepad if openText is set: the decoded bytes of each channel in hexadecimal + ASCII (UART bursts, I2C transactions, synchronous words, summary of the logic channels), then an ASCII timing diagram of the channels, with the bits and bytes under each decoded waveform. The "Text file" tab chooses the sections, the frames on separate lines, the silences not drawn, the resolution and the width;
  • a VCD file (writeVcd, Value Change Dump), opened in PulseView (free software of the sigrok project, with its own protocol decoders) if openPulseView is set; GTKWave also reads it. Next to it, a PulseView session (writePulseViewSession, <base>.pvs) that PulseView loads by itself with the VCD file: its UART, I2C and SPI decoders are already set up from the channels (a SyncData channel is decoded as SPI).

With pulseViewPath empty (the default), the probe looks for PulseView in this order: the environment variable MICROPYTHONMCU_PULSEVIEW (path of pulseview.exe or of its folder, e.g. a copy on a network share), the portable copy fetched by get_pulseview.cmd into the PulseView folder next to the library, then the folder of the sigrok installer (C:/Program Files/sigrok/PulseView).

A level change is detected halfway between VIL and VIH; a level that changes and changes back at the same simulated instant is not recorded. Cost: one threshold-crossing function per channel that is not Off; on lines that already change at events of the model (outputs of the microcontroller or of a device), the probe adds no event of its own. The text file is written from the level changes kept in memory, without any extra event.

Parameters

TypeNameDefaultDescription
Files
StringfileName""Base name of the files written in the simulation folder (<base>.vcd, <base>.txt); empty = name of the component (full paths shown in the log)
BooleanwriteTexttrueWrite the text file: decoded bytes in hex + ASCII and ASCII timing diagram (options in the "Text file" tab)
BooleanopenTexttrueOpen the text file in Notepad at the end of the simulation
BooleanwriteVcdtrueWrite the VCD file (Value Change Dump), to be opened in PulseView or GTKWave
BooleanwritePulseViewSessiontrueWrite a PulseView session (<base>.pvs) next to the VCD file: PulseView, which loads it by itself with the VCD file, opens with its UART, I2C and SPI decoders already set up from the channels
BooleanopenPulseViewfalseOpen the VCD file in PulseView at the end of the simulation (a warning if PulseView is not found)
StringpulseViewPath""Path of the PulseView executable (free software of the sigrok project): absolute path, path relative to the simulation folder, or modelica:// URI; empty = automatic search (environment variable MICROPYTHONMCU_PULSEVIEW, copy fetched by get_pulseview.cmd next to the library, then the sigrok installer folder)
CH0 › Channel
Interfaces.ChannelKindch0KindInterfaces.ChannelKind.LogicKind of channel CH0: Off, Logic (also for a clock line), Uart, I2cSda (SCL on clockChannel), SyncData (clock on clockChannel)
Stringch0Name""Name of CH0 in the files (no comma); empty = CH0
CH0 › UART
Realch0Baudrate1200Speed of the serial link (baud)
Integerch0DataBits8Data bits, from 5 to 8
Interfaces.UartParitych0ParityInterfaces.UartParity.NoneParity: None, Even or Odd
Integerch0StopBits1Stop bits, 1 or 2
Interfaces.BitOrderch0UartBitOrderInterfaces.BitOrder.LsbFirstBit order (a UART sends the least significant bit first)
CH0 › Clock (I2cSda, SyncData)
Integerch0ClockChannel1Number of the clock channel (SCL for I2cSda, clock for SyncData), itself of kind Logic
CH0 › Synchronous serial (SyncData)
Interfaces.ClockEdgech0ClockEdgeInterfaces.ClockEdge.RisingEdge of the clock on which the data is read (HX711: Falling)
Integerch0WordBits8Bits per word (HX711: 24); the clock pulses left over are counted apart
Interfaces.BitOrderch0SyncBitOrderInterfaces.BitOrder.MsbFirstBit order (HX711 and most SPI devices: most significant bit first)
Booleanch0SignedfalseWords in two's complement (HX711: true)
CH1 › Channel
Interfaces.ChannelKindch1KindInterfaces.ChannelKind.LogicKind of channel CH1: Off, Logic (also for a clock line), Uart, I2cSda (SCL on clockChannel), SyncData (clock on clockChannel)
Stringch1Name""Name of CH1 in the files (no comma); empty = CH1
CH1 › UART
Realch1Baudrate1200Speed of the serial link (baud)
Integerch1DataBits8Data bits, from 5 to 8
Interfaces.UartParitych1ParityInterfaces.UartParity.NoneParity: None, Even or Odd
Integerch1StopBits1Stop bits, 1 or 2
Interfaces.BitOrderch1UartBitOrderInterfaces.BitOrder.LsbFirstBit order (a UART sends the least significant bit first)
CH1 › Clock (I2cSda, SyncData)
Integerch1ClockChannel0Number of the clock channel (SCL for I2cSda, clock for SyncData), itself of kind Logic
CH1 › Synchronous serial (SyncData)
Interfaces.ClockEdgech1ClockEdgeInterfaces.ClockEdge.RisingEdge of the clock on which the data is read (HX711: Falling)
Integerch1WordBits8Bits per word (HX711: 24); the clock pulses left over are counted apart
Interfaces.BitOrderch1SyncBitOrderInterfaces.BitOrder.MsbFirstBit order (HX711 and most SPI devices: most significant bit first)
Booleanch1SignedfalseWords in two's complement (HX711: true)
CH2 › Channel
Interfaces.ChannelKindch2KindInterfaces.ChannelKind.LogicKind of channel CH2: Off, Logic (also for a clock line), Uart, I2cSda (SCL on clockChannel), SyncData (clock on clockChannel)
Stringch2Name""Name of CH2 in the files (no comma); empty = CH2
CH2 › UART
Realch2Baudrate1200Speed of the serial link (baud)
Integerch2DataBits8Data bits, from 5 to 8
Interfaces.UartParitych2ParityInterfaces.UartParity.NoneParity: None, Even or Odd
Integerch2StopBits1Stop bits, 1 or 2
Interfaces.BitOrderch2UartBitOrderInterfaces.BitOrder.LsbFirstBit order (a UART sends the least significant bit first)
CH2 › Clock (I2cSda, SyncData)
Integerch2ClockChannel1Number of the clock channel (SCL for I2cSda, clock for SyncData), itself of kind Logic
CH2 › Synchronous serial (SyncData)
Interfaces.ClockEdgech2ClockEdgeInterfaces.ClockEdge.RisingEdge of the clock on which the data is read (HX711: Falling)
Integerch2WordBits8Bits per word (HX711: 24); the clock pulses left over are counted apart
Interfaces.BitOrderch2SyncBitOrderInterfaces.BitOrder.MsbFirstBit order (HX711 and most SPI devices: most significant bit first)
Booleanch2SignedfalseWords in two's complement (HX711: true)
CH3 › Channel
Interfaces.ChannelKindch3KindInterfaces.ChannelKind.LogicKind of channel CH3: Off, Logic (also for a clock line), Uart, I2cSda (SCL on clockChannel), SyncData (clock on clockChannel)
Stringch3Name""Name of CH3 in the files (no comma); empty = CH3
CH3 › UART
Realch3Baudrate1200Speed of the serial link (baud)
Integerch3DataBits8Data bits, from 5 to 8
Interfaces.UartParitych3ParityInterfaces.UartParity.NoneParity: None, Even or Odd
Integerch3StopBits1Stop bits, 1 or 2
Interfaces.BitOrderch3UartBitOrderInterfaces.BitOrder.LsbFirstBit order (a UART sends the least significant bit first)
CH3 › Clock (I2cSda, SyncData)
Integerch3ClockChannel2Number of the clock channel (SCL for I2cSda, clock for SyncData), itself of kind Logic
CH3 › Synchronous serial (SyncData)
Interfaces.ClockEdgech3ClockEdgeInterfaces.ClockEdge.RisingEdge of the clock on which the data is read (HX711: Falling)
Integerch3WordBits8Bits per word (HX711: 24); the clock pulses left over are counted apart
Interfaces.BitOrderch3SyncBitOrderInterfaces.BitOrder.MsbFirstBit order (HX711 and most SPI devices: most significant bit first)
Booleanch3SignedfalseWords in two's complement (HX711: true)
CH4 › Channel
Interfaces.ChannelKindch4KindInterfaces.ChannelKind.OffKind of channel CH4: Off, Logic (also for a clock line), Uart, I2cSda (SCL on clockChannel), SyncData (clock on clockChannel)
Stringch4Name""Name of CH4 in the files (no comma); empty = CH4
CH4 › UART
Realch4Baudrate1200Speed of the serial link (baud)
Integerch4DataBits8Data bits, from 5 to 8
Interfaces.UartParitych4ParityInterfaces.UartParity.NoneParity: None, Even or Odd
Integerch4StopBits1Stop bits, 1 or 2
Interfaces.BitOrderch4UartBitOrderInterfaces.BitOrder.LsbFirstBit order (a UART sends the least significant bit first)
CH4 › Clock (I2cSda, SyncData)
Integerch4ClockChannel3Number of the clock channel (SCL for I2cSda, clock for SyncData), itself of kind Logic
CH4 › Synchronous serial (SyncData)
Interfaces.ClockEdgech4ClockEdgeInterfaces.ClockEdge.RisingEdge of the clock on which the data is read (HX711: Falling)
Integerch4WordBits8Bits per word (HX711: 24); the clock pulses left over are counted apart
Interfaces.BitOrderch4SyncBitOrderInterfaces.BitOrder.MsbFirstBit order (HX711 and most SPI devices: most significant bit first)
Booleanch4SignedfalseWords in two's complement (HX711: true)
CH5 › Channel
Interfaces.ChannelKindch5KindInterfaces.ChannelKind.OffKind of channel CH5: Off, Logic (also for a clock line), Uart, I2cSda (SCL on clockChannel), SyncData (clock on clockChannel)
Stringch5Name""Name of CH5 in the files (no comma); empty = CH5
CH5 › UART
Realch5Baudrate1200Speed of the serial link (baud)
Integerch5DataBits8Data bits, from 5 to 8
Interfaces.UartParitych5ParityInterfaces.UartParity.NoneParity: None, Even or Odd
Integerch5StopBits1Stop bits, 1 or 2
Interfaces.BitOrderch5UartBitOrderInterfaces.BitOrder.LsbFirstBit order (a UART sends the least significant bit first)
CH5 › Clock (I2cSda, SyncData)
Integerch5ClockChannel4Number of the clock channel (SCL for I2cSda, clock for SyncData), itself of kind Logic
CH5 › Synchronous serial (SyncData)
Interfaces.ClockEdgech5ClockEdgeInterfaces.ClockEdge.RisingEdge of the clock on which the data is read (HX711: Falling)
Integerch5WordBits8Bits per word (HX711: 24); the clock pulses left over are counted apart
Interfaces.BitOrderch5SyncBitOrderInterfaces.BitOrder.MsbFirstBit order (HX711 and most SPI devices: most significant bit first)
Booleanch5SignedfalseWords in two's complement (HX711: true)
CH6 › Channel
Interfaces.ChannelKindch6KindInterfaces.ChannelKind.OffKind of channel CH6: Off, Logic (also for a clock line), Uart, I2cSda (SCL on clockChannel), SyncData (clock on clockChannel)
Stringch6Name""Name of CH6 in the files (no comma); empty = CH6
CH6 › UART
Realch6Baudrate1200Speed of the serial link (baud)
Integerch6DataBits8Data bits, from 5 to 8
Interfaces.UartParitych6ParityInterfaces.UartParity.NoneParity: None, Even or Odd
Integerch6StopBits1Stop bits, 1 or 2
Interfaces.BitOrderch6UartBitOrderInterfaces.BitOrder.LsbFirstBit order (a UART sends the least significant bit first)
CH6 › Clock (I2cSda, SyncData)
Integerch6ClockChannel5Number of the clock channel (SCL for I2cSda, clock for SyncData), itself of kind Logic
CH6 › Synchronous serial (SyncData)
Interfaces.ClockEdgech6ClockEdgeInterfaces.ClockEdge.RisingEdge of the clock on which the data is read (HX711: Falling)
Integerch6WordBits8Bits per word (HX711: 24); the clock pulses left over are counted apart
Interfaces.BitOrderch6SyncBitOrderInterfaces.BitOrder.MsbFirstBit order (HX711 and most SPI devices: most significant bit first)
Booleanch6SignedfalseWords in two's complement (HX711: true)
CH7 › Channel
Interfaces.ChannelKindch7KindInterfaces.ChannelKind.OffKind of channel CH7: Off, Logic (also for a clock line), Uart, I2cSda (SCL on clockChannel), SyncData (clock on clockChannel)
Stringch7Name""Name of CH7 in the files (no comma); empty = CH7
CH7 › UART
Realch7Baudrate1200Speed of the serial link (baud)
Integerch7DataBits8Data bits, from 5 to 8
Interfaces.UartParitych7ParityInterfaces.UartParity.NoneParity: None, Even or Odd
Integerch7StopBits1Stop bits, 1 or 2
Interfaces.BitOrderch7UartBitOrderInterfaces.BitOrder.LsbFirstBit order (a UART sends the least significant bit first)
CH7 › Clock (I2cSda, SyncData)
Integerch7ClockChannel6Number of the clock channel (SCL for I2cSda, clock for SyncData), itself of kind Logic
CH7 › Synchronous serial (SyncData)
Interfaces.ClockEdgech7ClockEdgeInterfaces.ClockEdge.RisingEdge of the clock on which the data is read (HX711: Falling)
Integerch7WordBits8Bits per word (HX711: 24); the clock pulses left over are counted apart
Interfaces.BitOrderch7SyncBitOrderInterfaces.BitOrder.MsbFirstBit order (HX711 and most SPI devices: most significant bit first)
Booleanch7SignedfalseWords in two's complement (HX711: true)
Text file › Contents
BooleantextHexDumptrueSection of the decoded bytes in hex + ASCII (bursts, transactions, words), and summary of the logic channels
BooleantextWaveformtrueASCII timing diagram of the channels, with the decoded bytes under the waveform
BooleantextBitLabelstrueUnder each decoded waveform, the bits one by one (S start, P parity, s stop, A/N acknowledge...) above the bytes
Text file › Layout
BooleantextSplitFramestrueEach frame (UART burst, I2C transaction, burst of clock pulses) starts on a new line, with a header
BooleantextCompressSilencestrueA silence longer than textSilence is not drawn: one line gives its duration
Modelica.Units.SI.TimetextSilence0Shortest silence that is not drawn; 0 = automatic (40 columns)
Modelica.Units.SI.TimetextResolution0Duration of one column of the timing diagram; 0 = automatic (half a bit of the fastest UART, half a level of the fastest clock)
IntegertextWidth100Columns of the timing diagram per line
Electrical
Modelica.Units.SI.VoltageVIHInterfaces.VIHThreshold above which a channel reads high
Modelica.Units.SI.VoltageVILInterfaces.VILThreshold below which a channel reads low (the level changes halfway between VIL and VIH)
Modelica.Units.SI.ConductanceGInInterfaces.GOffInput conductance of each channel to GND: 1e-9 S = 1 GOhm, the circuit is not disturbed, and an unconnected channel reads 0
BooleanuseGroundPintrueShow the GND pin - unchecked: the probe is referenced to the simulation ground (0 V), nothing to wire

Connectors

TypeNameDefaultDescription
Modelica.Electrical.Analog.Interfaces.PositivePinCH0Channel 0 - shown when its kind is not Off
Modelica.Electrical.Analog.Interfaces.PositivePinCH1Channel 1 - shown when its kind is not Off
Modelica.Electrical.Analog.Interfaces.PositivePinCH2Channel 2 - shown when its kind is not Off
Modelica.Electrical.Analog.Interfaces.PositivePinCH3Channel 3 - shown when its kind is not Off
Modelica.Electrical.Analog.Interfaces.PositivePinCH4Channel 4 - shown when its kind is not Off
Modelica.Electrical.Analog.Interfaces.PositivePinCH5Channel 5 - shown when its kind is not Off
Modelica.Electrical.Analog.Interfaces.PositivePinCH6Channel 6 - shown when its kind is not Off
Modelica.Electrical.Analog.Interfaces.PositivePinCH7Channel 7 - shown when its kind is not Off
Modelica.Electrical.Analog.Interfaces.NegativePinGNDCommon reference (ground) of the probe, to be connected to the ground of the circuit - shown when useGroundPin is checked